High-Level Synthesis For RISC-V

High-quality RISC-V implementations are becoming more numerous, but it is the extensibility of the architecture that is driving a lot of design activity. The challenge is designing and implementing custom processors without having to re-implement them every time at the register transfer level (RTL).

from Pocket https://semiengineering.com/high-level-synthesis-for-risc-v/
via IFTTT